Carrier traps are inevitable in gallium nitride (GaN) on silicon (Si) heterostructure devices. When used for high-voltage power switching applications, carriers can be trapped in regions located at the surface of semiconductors, the interface between dielectrics and semiconductors, and the bulk of semiconductors, as the electric field therein increases, and then start to de-trap as the electric field decreases. These regions are referred to herein as surface traps and bulk traps, respectively. They are considered ‘deep’ traps in the sense that the energy required to de-trap an electron or hole from the trap to the conduction or valence is much larger than the characteristic thermal energy kT, where k is the Boltzmann constant and T is temperature. For example, dangling bonds or native oxide at the surface of gallium nitride or aluminum gallium nitride can lead to the formation of surface traps, while defects/dislocations or compensate doping (e.g. carbon doping), which is essential for achieving high blocking voltage, may act as bulk traps.
The carrier trapping and de-trapping processes induce additional switching or conduction losses when the devices fabricated on the semiconductor platform undergo dynamic operations, leading to large power losses and significant device instability. For example, when the de-trapping speed of the electrons is slower than the switching speed of the devices (which occurs for deep traps), the trapped electrons can degrade dynamic performances of the devices, leading to adverse effects such as instability of threshold voltage (Vth) and increase of dynamic on-resistance Ron, a phenomenon referred to as ‘current collapse.’ Full exploitation of the superior material properties of III-nitride semiconductors is thus hindered by electron/hole traps which are inevitable in state-of-the-art epitaxial samples. Accordingly, the performance of high electron mobility transistors (HEMT) based on III-nitride semiconductor heterostructures with a Schottky gate or metal-insulator-semiconductor (MIS) gate or metal-oxide-semiconductor (MOS) gate for high-power radio-frequency (RF)/microwave electronics and/or high-voltage power electronics could be dramatically enhanced when the effects of deep traps can be suppressed or eliminated.